Datasheet
MSP430x23x, MSP430x24x(1), MSP430x2410
MIXED SIGNAL MICROCONTROLLER
SLAS547 -- JUNE 2007
21
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
flash memory
The flash memory can be programmed v ia the JTAG port, the bootstrap loader, or in-system by the CPU. The
CPU can perform single-byte and single-word writes to the flash memory. Features of the flash memory include:
D Flash memory has n segments of main memory and four segments of information memory (A to D) of
64 bytes each. Each segment in main memory is 512 bytes in size.
D Segments 0 to n may be erased in one step, or each segment may be individually erased.
D Segments A to D can be erased individually, or as a group with segments 0--n.
Segments A to D are also called information memory.
D Segment A contains calibration data. After reset segment A is protected against programming or erasing.
It can be unlocked but care should be taken not to erase this segment if the calibration data is required.
D Flash content integrity check with marginal read modes.
peripherals
Peripherals are connected to the CPU through data, address, and control busses and can be handled using
all instructions. For complete module descriptions, see the MSP430x2xx Family User’s Guide, literature number
SLAU144.
oscillator and system clock
The clock system in the MSP430x23x, MSP43x24x(1), and MSP430F2410 family of devices is supported by
the basic clock module that includes support for a 32768-Hz watch crystal oscillator, an internal very low power,
low frequency oscillator, an internal digitally-controlled oscillator (DCO) and a high frequency crystal oscillator.
The basic clock module is designed to meet the requirements of both low system cost and low-power
consumption. The internal DCO provides a fast turn-on clock source and stabilizes in less than 1 μs. The basic
clock module provides the following clock signals:
D Auxiliary clock (ACLK), sourced from a 32768-Hz watch crystal, a high frequency crystal, or a very low
power LF oscillator.
D Main clock (MCLK), the system clock used by the CPU.
D Sub-Main clock (SMCLK), the sub-system clock used by the peripheral modules.
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