Datasheet

MSP430x23x, MSP430x24x(1), MSP430x2410
MIXED SIGNAL MICROCONTROLLER
SLAS547 -- JUNE 2007
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Terminal Functions -- MSP430F24x1 (Continued)
TERMINAL
I
/
O
D
E
S
C
R
I
P
T
I
O
N
NAME NO.
I
/
O DESCRIPTION
P4.2/TB2 38 I/O General-purpose digital I/O pin/Timer_B, capture: CCI2A/B input, compare: Out2 output
P4.3/TB3 39 I/O General-purpose digital I/O pin/Timer_B, capture: CCI3A/B input, compare: Out3 output
P4.4/TB4 40 I/O General-purpose digital I/O pin/Timer_B, capture: CCI4A/B input, compare: Out4 output
P4.5/TB5 41 I/O General-purpose digital I/O pin/Timer_B, capture: CCI5A/B input, compare: Out5 output
P4.6/TB6 42 I/O General-purpose digital I/O pin/Timer_B, capture: CCI6A input, compare: Out6 output
P4.7/TBCLK 43 I/O General-purpose digital I/O pin/Timer_B, clock signal TBCLK input
P5.0/UCB1STE/
UCA1CLK
44 I/O General-purpose digital I/O pin/USCI B1 slave transmit enable/USCI A1 clock input/output
P5.1/UCB1SIMO/
UCB1SDA
45 I/O General-purpose digital I/O pin/USCI B1slave in/master out in SPI mode, SDA I
2
CdatainI
2
C mode
P5.2/UCB1SOMI/
UCB1SCL
46 I/O General-purpose digital I/O pin/USCI B1slave out/master in i n SPI mode, SCL I
2
C clock in I
2
C mode
P5.3/UCB1CLK/
UCA1STE
47 I/O General-purpose digital I/O/USCI B1 clock input/output, USCI A1 slave transmit enable
P5.4/MCLK 48 I/O General-purpose digital I/O pin/main system clock MCLK output
P5.5/SMCLK 49 I/O General-purpose digital I/O pin/submain system clock SMCLK output
P5.6/ACLK 50 I/O General-purpose digital I/O pin/auxiliary clock ACLK output
P5.7/TBOUTH/
SVSOUT
51 I/O General-purpose digital I/O pin/switch all PWM digital output ports to high impedance -- Timer_B TB0 to
TB6/SVS comparator output
P6.0 59 I/O General-purpose digital I/O pin
P6.1 60 I/O General-purpose digital I/O pin
P6.2 61 I/O General-purpose digital I/O pin
P6.3 2 I/O General-purpose digital I/O pin
P6.4 3 I/O General-purpose digital I/O pin
P6.5 4 I/O General-purpose digital I/O pin
P6.6 5 I/O General-purpose digital I/O pin
P6.7/SVSIN 6 I/O General-purpose digital I/O pin/SVS input
XT2OUT 52 O Output terminal of crystal oscillator XT2
XT2IN 53 I Input port for crystal oscillator XT2
RST/NMI 58 I Reset input, nonmaskable interrupt input port, or bootstrap loader start (in Flash devices).
TCK 57 I Test clock (JTAG). TCK is the clock input port for device programming test and bootstrap loader start
TDI/TCLK 55 I Test data i nput or test clock input. The device protection fuse is connected to TDI/TCLK.
TDO/TDI 54 I/O Test data output port. TDO/TDI data output or programming data input terminal
TMS 56 I Test mode select. TMS is used as an input port for device programming and test.
DV
SS
10 I Connected to DV
SS
Reserved 7 O Reserved, do not connect externally
DV
SS
11 I Connected to DV
SS
XIN 8 I Input port for crystal oscillator XT1. Standard or watch crystals can be connected.
XOUT 9 O Output port for crystal oscillator XT1. Standard or watch crystals can be connected.
QFN Pad NA NA QFN package pad connection to DV
SS
recommended (RTD package only)
†
MSP430F24x and MSP430F23x devices only
PRODUCT PRE
V
IEW