Datasheet

Direction
0: Input
1: Output
P3SEL.x
P3DIR.x
P3IN.x
D
EN
Module X IN
Module X OUT
P3OUT.x
DVSS
DVCC
Pad Logic
1
1
0
1
0
1
0
P3.0/UCB0STE/UCA0CLK
P3.1/UCB0SIMO/UCB0SDA
P3.2/UCB0SOMI/UCB0SCL
P3.3/UCB0CLK/UCA0STE
P3.4/UCA0TXD/UCA0SIMO
P3.5/UCA0RXD/UCA0SOMI
P3REN.x
Module
direction
MSP430F23x0
www.ti.com SLAS518E –AUGUST 2006– REVISED AUGUST 2011
Port P3 Pin Schematic: P3.0 to P3.5, Input/Output With Schmitt Trigger
Table 23. Port P3 (P3.0 to P3.5) Pin Functions
CONTROL BITS / SIGNALS
(1)
PIN NAME (P3.x) x FUNCTION
P3DIR.x P3SEL.x
P3.0 (I/O) I: 0, O: 1 0
P3.0/UCB0STE/
0
UCA0CLK
UCB0STE/UCA0CLK
(2)
X 1
P3.1 (I/O) I: 0, O: 1 0
P3.1/UCB0SIMO/
1
UCB0SDA
UCB0SIMO/UCB0SDA
(2)(3)
X 1
P3.2 (I/O) I: 0, O: 1 0
P3.2/UCB0SOMI/
2
UCB0SCL
UCB0SOMI/UCB0SCL
(2)(3)
X 1
P3.3 (I/O) I: 0, O: 1 0
P3.3/UCB0CLK/
3
UCA0STE
UCB0CLK/UCA0STE
(2)
X 1
P3.4 (I/O) I: 0, O: 1 0
P3.4/UCA0TXD/
4
UCA0SIMO
UCA0TXD/UCA0SIMO
(2)
X 1
P3.5 (I/O) I: 0, O: 1 0
P3.5/UCA0RXD/
5
UCA0SOMI
UCA0RXD/UCA0SOMI
(2)
X 1
(1) X = Don't care
(2) The pin direction is controlled by the USCI module.
(3) If the I2C functionality is selected, the output drives only the logical 0 to V
SS
level.
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