Datasheet

MSP430x22x2, MSP430x22x4
MIXED SIGNAL MICROCONTROLLER
SLAS504B − JULY 2006 − REVISED JULY 2007
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
MSP430x22x2 functional block diagram
Basic Clock
System+
RAM
1kB
512B
512B
Brownout
Protection
RST/NMI
VCC VSS
MCLK
SMCLK
Watchdog
WDT+
15/16−Bit
Timer_A3
3CC
Registers
16MHz
CPU
incl. 16
Registers
Emulation
(2BP)
XOUT
JTAG
Interface
Flash
32kB
16kB
8kB
ACLK
XIN
MDB
MAB
Spy−Bi Wire
Timer_B3
3CC
Registers,
Shadow
Reg
USCI_A0:
UART/LIN,
IrDA, SPI
USCI_B0:
SPI, I2C
ADC10
10−Bit
12
Channels,
Autoscan,
DTC
Ports P1/P2
2x8 I/O
Interrupt
capability,
pull−up/down
resistors
Ports P3/P4
2x8 I/O
pull−up/down
resistors
P1.x/P2.x
2x8
P3.x/P4.x
2x8
NOTE: See port schematics section for detailed I/O information.
MSP430x22x4 functional block diagram
Basic Clock
System+
RAM
1kB
512B
512B
Brownout
Protection
RST/NMI
VCC VSS
MCLK
SMCLK
Watchdog
WDT+
15/16−Bit
Timer_A3
3CC
Registers
16MHz
CPU
incl. 16
Registers
Emulation
(2BP)
XOUT
JTAG
Interface
Flash
32kB
16kB
8kB
ACLK
XIN
MDB
MAB
Spy−Bi Wire
Timer_B3
3CC
Registers,
Shadow
Reg
USCI_A0:
UART/LIN,
IrDA, SPI
USCI_B0:
SPI, I2C
OA0, OA1
2 Op Amps
ADC10
10−Bit
12
Channels,
Autoscan,
DTC
Ports P1/P2
2x8 I/O
Interrupt
capability,
pull−up/down
resistors
Ports P3/P4
2x8 I/O
pull−up/down
resistors
P1.x/P2.x
2x8
P3.x/P4.x
2x8
NOTE: See port schematics section for detailed I/O information.