Datasheet
Bus
Keeper
EN
Direction
0: Input
1: Output
P4SEL.5
1
0
P4DIR.5
P4IN.5
D
EN
Module X IN
1
0
Module X OUT
P4OUT.5
P4.5/TB3/A14/OA0I3
1
0
DVSS
DVCC
P4REN.5
ADC10AE1.6
Pad Logic
INCHx = 14
To ADC 10
1
P4DIR.6
P4SEL.6
ADC10AE1.7
P4.6/TBOUTH/A15/OA1I3
Timer_B Output Tristate Logic
OA0
+
−
MSP430F22x2
MSP430F22x4
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SLAS504G –JULY 2006–REVISED AUGUST 2012
Port P4 Pin Schematic: P4.5, Input/Output With Schmitt Trigger
Table 36. Port P4 (P4.5) Pin Functions
CONTROL BITS/SIGNALS
(1)
PIN NAME (P4.x) x y FUNCTION
P4DIR.x P4SEL.x ADC10AE1.y
P4.5
(2)
(I/O) I: 0; O: 1 0 0
P4.5/TB3/A14/OA0I3 5 6 Timer_B3.TB2 1 1 0
A14/OA0I3
(3)
X X 1
(1) X = Don't care
(2) Default after reset (PUC/POR)
(3) Setting the ADC10AE1.y bit disables the output driver as well as the input Schmitt trigger to prevent parasitic cross currents when
applying analog signals.
Copyright © 2006–2012, Texas Instruments Incorporated 75