Datasheet

Bus
Keeper
EN
Direction
0: Input
1: Output
P3SEL.x
1
0
P3DIR.x
P3IN.x
D
EN
Module X IN
1
0
Module X OUT
P3OUT.x
1
0
DVSS
DVCC
P3REN.x
Pad Logic
1
USCI Direction
Control
DVSS
P3.1/UCB0SIMO/UCB0SDA
P3.2/UCB0SOMI/UCB0SCL
P3.3/UCB0CLK/UCA0STE
P3.4/UCA0TXD/UCA0SIMO
P3.5/UCA0RXD/UCA0SOMI
MSP430F22x2
MSP430F22x4
SLAS504G –JULY 2006–REVISED AUGUST 2012 www.ti.com
Port P3 Pin Schematic: P3.1 to P3.5, Input/Output With Schmitt Trigger
Table 32. Port P3 (P3.1 to P3.5) Pin Functions
CONTROL BITS/SIGNALS
(1)
PIN NAME (P3.x) x FUNCTION
P3DIR.x P3SEL.x
P3.1
(2)
(I/O) I: 0; O: 1 0
P3.1/UCB0SIMO/UCB0SDA 1
UCB0SIMO/UCB0SDA
(3)
X 1
P3.2
(2)
(I/O) I: 0; O: 1 0
P3.2/UCB0SOMI/UCB0SCL 2
UCB0SOMI/UCB0SCL
(3)
X 1
P3.3
(2)
(I/O) I: 0; O: 1 0
P3.3/UCB0CLK/UCA0STE 3
UCB0CLK/UCA0STE
(3) (4)
X 1
P3.4
(2)
(I/O) I: 0; O: 1 0
P3.4/UCA0TXD/UCA0SIMO 4
UCA0TXD/UCA0SIMO
(3)
X 1
P3.5
(2)
(I/O) I: 0; O: 1 0
P3.5/UCA0RXD/UCA0SOMI 5
UCA0RXD/UCA0SOMI
(3)
X 1
(1) X = Don't care
(2) Default after reset (PUC/POR)
(3) The pin direction is controlled by the USCI module.
(4) UCB0CLK function takes precedence over UCA0STE function. If the pin is required as UCB0CLK input or output, USCI_A0 is forced to
3-wire SPI mode even if 4-wire SPI mode is selected.
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