Datasheet

MSP430F22x2
MSP430F22x4
www.ti.com
SLAS504G JULY 2006REVISED AUGUST 2012
Table 4. Terminal Functions, MSP430F22x4 (continued)
TERMINAL
NO. I/O DESCRIPTION
NAME
YFF DA RHA
General-purpose digital I/O pin
Timer_B, capture: CCI0B input, compare: OUT0 output
P4.3/TB0/A12/OA0O E7 20 18 I/O
ADC10 analog input A12
OA0 analog output
General-purpose digital I/O pin
Timer_B, capture: CCI1B input, compare: OUT1 output
P4.4/TB1/A13/OA1O F7 21 19 I/O
ADC10 analog input A13
OA1 analog output
General-purpose digital I/O pin
Timer_B, compare: OUT2 output
P4.5/TB2/A14/OA0I3 F6 22 20 I/O
ADC10 analog input A14
OA0 analog input I3
General-purpose digital I/O pin
Timer_B, switch all TB0 to TB3 outputs to high impedance
P4.6/TBOUTH/A15/OA1I3 G7 23 21 I/O
ADC10 analog input A15
OA1 analog input I3
General-purpose digital I/O pin
P4.7/TBCLK F5 24 22 I/O
Timer_B, clock signal TBCLK input
Reset or nonmaskable interrupt input
RST/NMI/SBWTDIO B3 7 5 I
Spy-Bi-Wire test data input/output during programming and test
Selects test mode for JTAG pins on Port 1. The device protection fuse is
connected to TEST.
TEST/SBWTCK D1 1 37 I
Spy-Bi-Wire test clock input during programming and test
C1,
D3,
DV
CC
2 38, 39 Digital supply voltage
D4,
E4, E5
C6,
AV
CC
C7, 16 14 Analog supply voltage
D5
A3,
B1,
DV
SS
B2, 4 1, 4 Digital ground reference
C3,
C4
B7,
AV
SS
15 13 Analog ground reference
C5
QFN Pad NA NA Pad NA QFN package pad; connection to DV
SS
recommended.
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