Datasheet
SLAS439A − SEPTEMBER 2004 − REVISED JUNE 2005
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
interrupt vector addresses
The interrupt vectors and the power-up starting address are located in the address range of 0FFFFh−0FFC0h.
The vector contains the 16-bit address of the appropriate interrupt handler instruction sequence.
If the reset vector (located at address 0FFFEh) contains 0FFFFh (e.g. flash is not programmed) the CPU will
go into LPM4 immediately after power−up.
INTERRUPT SOURCE INTERRUPT FLAG SYSTEM INTERRUPT WORD ADDRESS PRIORITY
Power-up
External reset
Watchdog
Flash key violation
PC out-of-range (see Note 1)
PORIFG
RSTIFG
WDTIFG
KEYV
(see Note 2)
Reset 0FFFEh 31, highest
NMI
Oscillator fault
Flash memory access violation
NMIIFG
OFIFG
ACCVIFG
(see Notes 2 & 4)
(non)-maskable,
(non)-maskable,
(non)-maskable
0FFFCh 30
0FFFAh 29
0FFF8h 28
Comparator_A+ CAIFG maskable 0FFF6h 27
Watchdog Timer WDTIFG maskable 0FFF4h 26
Timer_A2 TACCR0 CCIFG (see Note 3) maskable 0FFF2h 25
Timer_A2
TACCR1 CCIFG,
TAIFG (see Notes 2 & 3)
maskable 0FFF0h 24
0FFEEh 23
0FFECh 22
0FFEAh 21
0FFE8h 20
I/O Port P2
(eight flags)
P2IFG.0 to P2IFG.7
(see Notes 2 & 3)
maskable 0FFE6h 19
I/O Port P1
(eight flags)
P1IFG.0 to P1IFG.7
(see Notes 2 & 3)
maskable 0FFE4h 18
0FFE2h 17
0FFE0h 16
(see Note 5) 0FFDEh 15
(see Note 6) 0FFDCh ... 0FFC0h 14 ... 0, lowest
NOTES: 1. A reset is generated if the CPU tries to fetch instructions from within the module register memory address range (0h−01FFh).
2. Multiple source flags
3. Interrupt flags are located in the module
4. (non)-maskable: the individual interrupt-enable bit can disable an interrupt event, but the general interrupt enable cannot.
5. This location is used as bootstrap loader security key (BSLSKEY).
A value of 0AA55h at this location disables the BSL completely.
A value of 0h disables the erasure of the flash if an invalid password is supplied.
6. The interrupt vectors at addresses 0FFDCh to 0FFC0h are not used in this device and can be used for regular program code if
necessary.