Datasheet

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  
SLAS439A − SEPTEMBER 2004 − REVISED JUNE 2005
33
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Port P1 pin schematic: P1.4 to P1.7, input/output with Schmitt-trigger and in-system access features
Bus
Keeper
EN
Direction
0: Input
1: Output
P1SEL.1
1
0
P1DIR.1
P1IN.1
P1IRQ.1
D
EN
Module X IN
1
0
Module X OUT
P1OUT.1
Interrupt
Edge
Select
Q
EN
Set
P1SEL.1
P1IES.1
P1IFG.1
P1IE.1
1
0
DVSS
DVCC
P1REN.1
Pad Logic
1
To JTAG
TEST pad
TEST
JTAG
Fuse
DVSS
From JTAG
TDO From JTAG
P1.7/TA2/TDO/TDI only
P1.4/SMCLK/TCK
P1.5/TA0/TMS
P1.6/TA1/TDI
P1.7/TA2/TDO/TDI