Datasheet

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  
SLAS439A − SEPTEMBER 2004 − REVISED JUNE 2005
32
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
Port P1 pin schematic: P1.0 to P1.3, input/output with Schmitt-trigger
Direction
0: Input
1: Output
P1SEL.x
1
0
P1DIR.x
P1IN.x
P1IRQ.x
D
EN
Module X IN
1
0
Module X OUT
P1OUT.x
Interrupt
Edge
Select
Q
EN
Set
P1SEL.x
P1IES.x
P1IFG.x
P1IE.x
P1.0/TACLK
P1.1/TA0
P1.2/TA1
P1.3/TA2
1
0
DVSS
DVCC
P1REN.x
Pad Logic
1
Port P1 (P1.0 to P1.3) pin functions
PIN NAME (P1.X)
X
FUNCTION
CONTROL BITS / SIGNALS
PIN NAME (P1.X)
X
FUNCTION
P1DIR.x P1SEL.x
P1.0/TACLK 0
P1.0† (I/O) I: 0; O: 1 0
P1.0/TACLK
0
TACLK 0 1
DV
SS
1 1
P1.1/TA0 1
P1.1† (I/O) I: 0; O: 1 0
P1.1/TA0
1
Timer_A3.CCI0A 0 1
Timer_A3.TA0 1 1
P1.2/TA1 2
P1.2† (I/O) I: 0; O: 1 0
P1.2/TA1
2
Timer_A3.CCI0A 0 1
Timer_A3.TA0 1 1
P1.3/TA2 3
P1.3† (I/O) I: 0; O: 1 0
P1.3/TA2
3
Timer_A3.CCI0A 0 1
Timer_A3.TA0 1 1
†
Default after reset (PUC/POR)
NOTES: 1. N/A: Not available or not applicable.
2. X: Don’t care.