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28.2 EEM Building Blocks
28.2.1 Triggers
The event control in the EEM of the MSP430 system consists of triggers, which are internal signals
indicating that a certain event has happened. These triggers may be used as simple breakpoints, but it is
also possible to combine two or more triggers to allow detection of complex events and trigger various
reactions besides stopping the CPU.
In general, the triggers can be used to control the following functional blocks of the EEM:
• Breakpoints (CPU stop)
• State storage
• Sequencer
There are two different types of triggers, the memory trigger and the CPU register write trigger.
Each memory trigger block can be independently selected to compare either the MAB or the MDB with a
given value. Depending on the implemented EEM the comparison can be =, ≠, ≥, or ≤. The comparison
can also be limited to certain bits with the use of a mask. The mask is either bit-wise or byte-wise,
depending upon the device. In addition to selecting the bus and the comparison, the condition under which
the trigger is active can be selected. The conditions include read access, write access, DMA access, and
instruction fetch.
Each CPU register write trigger block can be independently selected to compare what is written into a
selected register with a given value. The observed register can be selected for each trigger independently.
The comparison can be =, ≠, ≥, or ≤. The comparison can also be limited to certain bits with the use of a
bit mask.
Both types of triggers can be combined to form more complex triggers. For example, a complex trigger
can signal when a particular value is written into a user-specified address.
28.2.2 Trigger Sequencer
The trigger sequencer allows the definition of a certain sequence of trigger signals before an event is
accepted for a break or state storage event. Within the trigger sequencer, it is possible to use the following
features:
• Four states (State 0 to State 3)
• Two transitions per state to any other state
• Reset trigger that resets the sequencer to State 0.
The Trigger sequencer always starts at State 0 and must execute to State 3 to generate an action. If State
1 or State 2 are not required, they can be bypassed.
28.2.3 State Storage (Internal Trace Buffer)
The state storage function uses a built-in buffer to store MAB, MDB, and CPU control signal information
(that is, read, write, or instruction fetch) in a non-intrusive manner. The built-in buffer can hold up to eight
entries. The flexible configuration allows the user to record the information of interest very efficiently.
28.2.4 Clock Control
The EEM provides device dependent flexible clock control. This is useful in applications where a running
clock is needed for peripherals after the CPU is stopped (for example, to allow a UART module to
complete its transfer of a character or to allow a timer to continue generating a PWM signal).
The clock control is flexible and supports both modules that need a running clock and modules that must
be stopped when the CPU is stopped due to a breakpoint.
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SLAU144J–December 2004–Revised July 2013 Embedded Emulation Module (EEM)
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