Datasheet

CPU Stop
Trigger
Blocks
MB0
MB1
MB2
MB3
MB4
MB5
MB6
MB7
CPU0
CPU1
&
0
Trigger Sequencer
”AND” Matrix − CombinationTriggers
&
1
&
2
&
3
&
4
&
5
&
6
&
7
Start/Stop State Storage
OR
OR
EEM Introduction www.ti.com
Figure 28-1. Large Implementation of the Embedded Emulation Module (EEM)
640
Embedded Emulation Module (EEM) SLAU144J–December 2004–Revised July 2013
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