Datasheet

Delayed Conversion
40
SD24OSRx = 32
Start of
Conversion
Time
Conversion
32
Conversion
32f
M
cycles:
1
st
Sample Ch1
SD24PRE0 = 8
SD24PRE1 = 0
Conversion
32
Conversion
32
Conversion
32
Conversion
1
st
Sample Ch0
Conversion
32
SD24OSRx = 32
Load SD24PREx
SD24PREx = 8
Preload
applied
Time
Delayed Conversion
40
Delayed Conversion
Result
Conversion
32f
M
cycles:
SD24_A Operation www.ti.com
27.2.10 Conversion Operation Using Preload
When multiple channels are grouped the SD24PREx registers can be used to delay the conversion time
frame for each channel. Using SD24PREx, the decimation time of the digital filter is increased by the
specified number of f
M
clock cycles and can range from 0 to 255. Figure 27-9 shows an example using
SD24PREx.
Figure 27-9. Conversion Delay Using Preload - Example
The SD24PREx delay is applied to the beginning of the next conversion cycle after being written. The
delay is used on the first conversion after SD24SC is set and on the conversion cycle following each write
to SD24PREx. Following conversions are not delayed. After modifying SD24PREx, the next write to
SD24PREx should not occur until the next conversion cycle is completed, otherwise the conversion results
may be incorrect.
The accuracy of the result for the delayed conversion cycle using SD24PREx is dependent on the length
of the delay and the frequency of the analog signal being sampled. For example, when measuring a DC
signal, SD24PREx delay has no effect on the conversion result regardless of the duration. The user must
determine when the delayed conversion result is useful in their application.
Figure 27-10 shows the operation of grouped channels 0 and 1. The preload register of channel 1 is
loaded with zero resulting in immediate conversion whereas the conversion cycle of channel 0 is delayed
by setting SD24PRE0 = 8. The first channel 0 conversion uses SD24PREx = 8, shifting all subsequent
conversions by eight f
M
clock cycles.
Figure 27-10. Start of Conversion Using Preload - Example
When channels are grouped, care must be taken when a channel or channels operate in single
conversion mode or are disabled in software while the master channel remains active. Each time channels
in the group are re-enabled and re-synchronize with the master channel, the preload delay for that
channel will be reintroduced. Figure 27-11 shows the re-synchronization and preload delays for channels
in a group. It is recommended that SD24PREx = 0 for the master channel to maintain a consistent delay
between the master and remaining channels in the group when they are re-enabled.
628
SD24_A SLAU144J–December 2004–Revised July 2013
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