Datasheet

1
2
3
4
1
0
0.2
0.4
0.6
0.8
1
0
0.2
0.4
0.6
0.8
1
2
3
Asynchronous Step Synchronous Step
% V
FSR
Conversion Conversion
−140
−120
−100
−80
−60
−40
−20
0
Frequency
GAIN [dB]
f
S
f
M
SD24_A Operation www.ti.com
Figure 27-3. Comb Filter Frequency Response With OSR = 32
Figure 27-4 shows the digital filter step response and conversion points. For step changes at the input
after start of conversion a settling time must be allowed before a valid conversion result is available. The
SD24INTDLYx bits can provide sufficient filter settling time for a full-scale change at the ADC input. If the
step occurs synchronously to the decimation of the digital filter the valid data will be available on the third
conversion. An asynchronous step will require one additional conversion before valid data is available.
Figure 27-4. Digital Filter Step Response and Conversion Points
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SD24_A SLAU144J–December 2004–Revised July 2013
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