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SD24_A Introduction

27.1 SD24_A Introduction

The SD24_A module consists of up to seven independent sigma-delta analog-to-digital converters,

referred to as channels, and an internal voltage reference. Each channel has up to eight fully differential

multiplexed analog input pairs including a built-in temperature sensor and a divided supply voltage. The

converters are based on second-order oversampling sigma-delta modulators and digital decimation filters.

The decimation filters are comb-type filters with selectable oversampling ratios of up to 1024. Additional

filtering can be done in software.

The digital filter output of SD24_A can range from 15 bits to 30 bits, based on the oversampling ratio. The

default oversampling ratio is 256, which results in 24-bit output from the digital filter. The 16 most

significant bits of the filter are captured in the SD24_A conversion memory register and, by setting

SD24LSBACC = 1, the 16 least significant bits of the filter output can be read (see Section 27.2.7 for

details).

Features of the SD24_A include:

• Up to seven independent, simultaneously-sampling ADC channels (the number of channels is device

dependent, see the device-specific data sheet)

• Up to eight multiplexed differential analog inputs per channel (the number of inputs is device

dependent, see the device-specific data sheet)

• Software selectable on-chip reference voltage generation (1.2 V)

• Software selectable internal or external reference

• Built-in temperature sensor accessible by all channels

• Up to 1.1-MHz modulator input frequency

• High impedance input buffer (not implemented on all devices, see the device-specific data sheet)

• Selectable low-power conversion mode

The block diagram of the SD24_A module is shown in Figure 27-1.

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SLAU144J–December 2004–Revised July 2013 SD24_A

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