Datasheet

FSR
1.2 V
2
±V = = ±0.6 V
1
REF
FSR
PGA
V
2
V =
GAIN
www.ti.com SD16_A Operation
26.2 SD16_A Operation
The SD16_A module is configured with user software. The setup and operation of the SD16_A is
discussed in the following sections.
26.2.1 ADC Core
The analog-to-digital conversion is performed by a 1-bit second-order sigma-delta modulator. A single-bit
comparator within the modulator quantizes the input signal with the modulator frequency f
M
. The resulting
1-bit data stream is averaged by the digital filter for the conversion result.
26.2.2 Analog Input Range and PGA
The full-scale input voltage range for each analog input pair is dependent on the gain setting of the
programmable gain amplifier of each channel. The maximum full-scale range is ±V
FSR
where V
FSR
is
defined by:
For a 1.2-V reference, the maximum full-scale input range for a gain of 1 is:
See the device-specific data sheet for full-scale input specifications.
26.2.3 Voltage Reference Generator
The SD16_A module has a built-in 1.2-V reference. It is enabled by the SD16REFON bit. When using the
internal reference an external 100-nF capacitor connected from V
REF
to AV
SS
is recommended to reduce
noise. The internal reference voltage can be used off-chip when SD16VMIDON = 1. The buffered output
can provide up to 1 mA of drive. When using the internal reference off-chip, a 470-nF capacitor connected
from V
REF
to AV
SS
is required. See the device-specific data sheet for parameters.
An external voltage reference can be applied to the V
REF
input when SD16REFON and SD16VMIDON are
both reset.
26.2.4 Auto Power-Down
The SD16_A is designed for low power applications. When the SD16_A is not actively converting, it is
automatically disabled and automatically re-enabled when a conversion is started. The reference is not
automatically disabled, but can be disabled by setting SD16REFON = 0. When the SD16_A or reference
are disabled, they consume no current.
26.2.5 Analog Input Pair Selection
The SD16_A can convert up to 8 differential input pairs multiplexed into the PGA. Up to five analog input
pairs (A0-A4) are available externally on the device. A resistive divider to measure the supply voltage is
available using the A5 multiplexer input. An internal temperature sensor is available using the A6
multiplexer input.
Input A7 is a shorted connection between the + and - input pair and can be used to calibrate the offset of
the SD16_A input stage. Note that the measured offset depends on the impedance of the external
circuitry; thus, the actual offset seen at any of the analog inputs may be different.
26.2.5.1 Analog Input Setup
The analog input is configured using the SD16INCTL0 and the SD16AE registers. The SD16INCHx bits
select one of eight differential input pairs of the analog multiplexer. The gain for the PGA is selected by
the SD16GAINx bits. A total of six gain settings are available. The SD16AEx bits enable or disable the
analog input pin. Setting any SD16AEx bit disables the multiplexed digital circuitry for the associated pin.
See the device-specific data sheet for pin diagrams.
601
SLAU144J–December 2004–Revised July 2013 SD16_A
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