Datasheet

Full-Scale Output
0800h (−2048) 07FFh (+2047)0
0
Output Voltage
DAC Data
Mid-Scale Output
Full-Scale Output
0 0FFFh
0
Output Voltage
DAC Data
DAC12 Operation www.ti.com
When DAC12LSELx = 0 the data latch is transparent and the DAC12_xDAT register is applied directly to
the DAC12 core. the DAC12 output updates immediately when new DAC12 data is written to the
DAC12_xDAT register, regardless of the state of the DAC12ENC bit.
When DAC12LSELx = 1, DAC12 data is latched and applied to the DAC12 core after new data is written
to DAC12_xDAT. When DAC12LSELx = 2 or 3, data is latched on the rising edge from the Timer_A CCR1
output or Timer_B CCR2 output respectively. DAC12ENC must be set to latch the new data when
DAC12LSELx > 0.
25.2.4 DAC12_xDAT Data Format
The DAC12 supports both straight binary and 2s compliment data formats. When using straight binary
data format, the full-scale output value is 0FFFh in 12-bit mode (0FFh in 8-bit mode) as shown in
Figure 25-2.
Figure 25-2. Output Voltage vs DAC12 Data, 12-Bit, Straight Binary Mode
When using 2s-compliment data format, the range is shifted such that a DAC12_xDAT value of 0800h
(0080h in 8-bit mode) results in a zero output voltage, 0000h is the mid-scale output voltage, and 07FFh
(007Fh for 8-bit mode) is the full-scale voltage output (see Figure 25-3).
Figure 25-3. Output Voltage vs DAC12 Data, 12-Bit, 2s-Compliment Mode
25.2.5 DAC12 Output Amplifier Offset Calibration
The offset voltage of the DAC12 output amplifier can be positive or negative. When the offset is negative,
the output amplifier attempts to drive the voltage negative but cannot do so. The output voltage remains at
zero until the DAC12 digital input produces a sufficient positive output voltage to overcome the negative
offset voltage, resulting in the transfer function shown in Figure 25-4.
592
DAC12 SLAU144J–December 2004–Revised July 2013
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