Datasheet

www.ti.com Supported Tags
24.2 Supported Tags
Each device contains a subset of the tags shown in Table 24-2. See the device-specific data sheet for
details.
Table 24-2. Supported Tags (Device Specific)
Tag Description Value
TAG_EMPTY Identifies an unused memory area 0xFE
TAG_DCO_30 Calibration values for the DCO at room temperature and DV
CC
= 3 V 0x01
TAG_ADC12_1 Calibration values for the ADC12 module 0x08
TAG_ADC10_1 Calibration values for the ADC10 module 0x08
24.2.1 DCO Calibration TLV Structure
For DCO calibration, the BCS+ registers (BCSCTL1 and DCOCTL) are used. The values stored in the
flash information memory SegmentA are written to the BCS+ registers (see Table 24-3).
Table 24-3. DCO Calibration Data (Device Specific)
Label Description Offset
CALBC1_1MHZ Value for the BCSCTL1 register for 1 MHz, T
A
= 25°C 0x07
CALDCO_1MHZ Value for the DCOCTL register for 1 MHz, T
A
= 25°C 0x06
CALBC1_8MHZ Value for the BCSCTL1 register for 8 MHz, T
A
= 25°C 0x05
CALDCO_8MHZ Value for the DCOCTL register for 8 MHz, T
A
= 25°C 0x04
CALBC1_12MHZ Value for the BCSCTL1 register for 12 MHz, T
A
= 25°C 0x03
CALDCO_12MHZ Value for the DCOCTL register for 12 MHz, T
A
= 25°C 0x02
CALBC1_16MHZ Value for the BCSCTL1 register for 16 MHz, T
A
= 25°C 0x01
CALDCO_16MHZ Value for the DCOCTL register for 16 MHz, T
A
= 25°C 0x00
The calibration data for the DCO is available in all 2xx devices and is stored at the same absolute
addresses. The device-specific SegmentA content is applied using the absolute addressing mode if the
sample code shown in Example 24-1 is used.
Example 24-1. Code Example Using Absolute Addressing Mode
; Calibrate the DCO to 1 MHz
CLR.B &DCOCTL ; Select lowest DCOx
; and MODx settings
MOV.B &CALBC1_1MHZ,&BCSCTL1 ; Set RSELx
MOV.B &CALDCO_1MHZ,&DCOCTL ; Set DCOx and MODx
The TLV structure allows use of the address of the TAG_DCO_30 tag to address the DCO registers.
Example 24-2 shows how to address the DCO calibration data using the TAG_DCO_30 tag.
Example 24-2. Code Example Using the TLV Structure
; Calibrate the DCO to 8 MHz
; It is assumed that R10 contains the address of the TAG_DCO_30 tag
CLR.B &DCOCTL ; Select lowest DCOx and
; MODx settings
MOV.B 7(R10),&BCSCTL1 ; Set RSEL
MOV.B 6(R10),&DCOCTL ; Set DCOx and MODx
583
SLAU144J–December 2004–Revised July 2013 TLV Structure
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