Datasheet

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23.2.9.2 ADC12 Interrupt Handling Software Example
Example 23-1 shows the recommended use of ADC12IV and the handling overhead. The ADC12IV value
is added to the PC to automatically jump to the appropriate routine.
The numbers at the right margin show the necessary CPU cycles for each instruction. The software
overhead for different interrupt sources includes interrupt latency and return-from-interrupt cycles, but not
the task handling itself. The latencies are:
• ADC12IFG0 to ADC12IFG14, ADC12TOV, and ADC12OV: 16 cycles
• ADC12IFG15: 14 cycles
The interrupt handler for ADC12IFG15 shows a way to check immediately if a higher prioritized interrupt
occurred during the processing of ADC12IFG15. This saves nine cycles if another ADC12 interrupt is
pending.
Example 23-1. Interrupt Handling
; Interrupt handler for ADC12.
INT_ADC12 ; Enter Interrupt Service Routine 6
ADD &ADC12IV,PC ; Add offset to PC 3
RETI ; Vector 0: No interrupt 5
JMP ADOV ; Vector 2: ADC overflow 2
JMP ADTOV ; Vector 4: ADC timing overflow 2
JMP ADM0 ; Vector 6: ADC12IFG0 2
... ; Vectors 8-32 2
JMP ADM14 ; Vector 34: ADC12IFG14 2
;
; Handler for ADC12IFG15 starts here. No JMP required.
;
ADM15 MOV &ADC12MEM15,xxx ; Move result, flag is reset
... ; Other instruction needed?
JMP INT_ADC12 ; Check other int pending
;
; ADC12IFG14-ADC12IFG1 handlers go here
;
ADM0 MOV &ADC12MEM0,xxx ; Move result, flag is reset
... ; Other instruction needed?
RETI ; Return 5
;
ADTOV ... ; Handle Conv. time overflow
RETI ; Return 5
;
ADOV ... ; Handle ADCMEMx overflow
RETI ; Return 5
573
SLAU144J–December 2004–Revised July 2013 ADC12
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