Datasheet

ADC10 Registers

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22.3.9 ADC10SA, Start Address Register for Data Transfer

15 14 13 12 11 10 9 8

ADC10SAx

rw-(0) rw-(0) rw-(0) rw-(0) rw-(0) rw-(0) rw-(0) rw-(0)

7 6 5 4 3 2 1 0

ADC10SAx 0

rw-(0) rw-(0) rw-(0) rw-(0) rw-(0) rw-(0) rw-(0) r0

ADC10SAx Bits 15-1 ADC10 start address. These bits are the start address for the DTC. A write to register ADC10SA is required

to initiate DTC transfers.

Unused Bit 0 Unused, Read only. Always read as 0.

558

ADC10 SLAU144J–December 2004–Revised July 2013

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