Datasheet

ADC10 Registers www.ti.com
CONSEQx Bits 2-1 Conversion sequence mode select
00 Single-channel-single-conversion
01 Sequence-of-channels
10 Repeat-single-channel
11 Repeat-sequence-of-channels
ADC10BUSY Bit 0 ADC10 busy. This bit indicates an active sample or conversion operation
0 No operation is active.
1 A sequence, sample, or conversion is active.
22.3.3 ADC10AE0, Analog (Input) Enable Control Register 0
7 6 5 4 3 2 1 0
ADC10AE0x
rw-(0) rw-(0) rw-(0) rw-(0) rw-(0) rw-(0) rw-(0) rw-(0)
ADC10AE0x Bits 7-0 ADC10 analog enable. These bits enable the corresponding pin for analog input. BIT0 corresponds to A0,
BIT1 corresponds to A1, etc. The analog enable bit of not implemented channels should not be programmed
to 1.
0 Analog input disabled
1 Analog input enabled
22.3.4 ADC10AE1, Analog (Input) Enable Control Register 1 (MSP430F22xx only)
7 6 5 4 3 2 1 0
ADC10AE1x Reserved
rw-(0) rw-(0) rw-(0) rw-(0) rw-(0) rw-(0) rw-(0) rw-(0)
ADC10AE1x Bits 7-4 ADC10 analog enable. These bits enable the corresponding pin for analog input. BIT4 corresponds to A12,
BIT5 corresponds to A13, BIT6 corresponds to A14, and BIT7 corresponds to A15. The analog enable bit of
not implemented channels should not be programmed to 1.
0 Analog input disabled
1 Analog input enabled
Reserved Bits 3-0 Reserved
22.3.5 ADC10MEM, Conversion-Memory Register, Binary Format
15 14 13 12 11 10 9 8
0 0 0 0 0 0 Conversion Results
r0 r0 r0 r0 r0 r0 r r
7 6 5 4 3 2 1 0
Conversion Results
r r r r r r r r
Conversion Bits 15-0 The 10-bit conversion results are right justified, straight-binary format. Bit 9 is the MSB. Bits 15-10 are
Results always 0.
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ADC10 SLAU144J–December 2004–Revised July 2013
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