Datasheet

D Q
IRQ, Interrupt Service Requested
Reset
ADC10CLK
POR
’n’ = 0
Set ADC10IFG
IRACC, Interrupt RequestAccepted
ADC10IE
Digital
Power Supply
Decoupling
100nF10uF
100nF10uF
Using an External
Positive Reference
Using an External
Negative Reference
DV
CC
DV
SS
AV
CC
AV
SS
V
REF-
/V
eREF-
V
REF+
/V
eREF+
Analog
Power Supply
Decoupling
(if available)
www.ti.com ADC10 Operation
Figure 22-15. ADC10 Grounding and Noise Considerations (External V
REF
)
22.2.10 ADC10 Interrupts
One interrupt and one interrupt vector are associated with the ADC10 as shown in Figure 22-16. When the
DTC is not used (ADC10DTC1 = 0), ADC10IFG is set when conversion results are loaded into
ADC10MEM. When DTC is used (ADC10DTC1 > 0), ADC10IFG is set when a block transfer completes
and the internal transfer counter n = 0. If both the ADC10IE and the GIE bits are set, then the ADC10IFG
flag generates an interrupt request. The ADC10IFG flag is automatically reset when the interrupt request
is serviced, or it may be reset by software.
Figure 22-16. ADC10 Interrupt System
551
SLAU144J–December 2004–Revised July 2013 ADC10
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