Datasheet

ADC10SA

ADC10SA+2

ADC10SA+2n−2

ADC10SA+2n−4

1st transfer

’n’th transfer

2nd transfer

TB=0

DTC

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ADC10 Operation

22.2.7.1 One-Block Transfer Mode

The one-block mode is selected if the ADC10TB is reset. The value n in ADC10DTC1 defines the total

number of transfers for a block. The block start address is defined anywhere in the MSP430 address

range using the 16-bit register ADC10SA. The block ends at ADC10SA + 2n – 2. The one-block transfer

mode is shown in Figure 22-9.

Figure 22-9. One-Block Transfer

The internal address pointer is initially equal to ADC10SA and the internal transfer counter is initially equal

to 'n'. The internal pointer and counter are not visible to software. The DTC transfers the word-value of

ADC10MEM to the address pointer ADC10SA. After each DTC transfer, the internal address pointer is

incremented by two and the internal transfer counter is decremented by one.

The DTC transfers continue with each loading of ADC10MEM, until the internal transfer counter becomes

equal to zero. No additional DTC transfers occur until a write to ADC10SA. When using the DTC in the

one-block mode, the ADC10IFG flag is set only after a complete block has been transferred. Figure 22-10

shows a state diagram of the one-block mode.

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SLAU144J–December 2004–Revised July 2013 ADC10

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