Datasheet

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ADC10 Operation
22.2.2.1 Analog Port Selection
The ADC10 external inputs Ax, V
eREF+
,and V
REF-
share terminals with general purpose I/O ports, which are
digital CMOS gates (see the device-specific data sheet). When analog signals are applied to digital CMOS
gates, parasitic current can flow from VCC to GND. This parasitic current occurs if the input voltage is
near the transition level of the gate. Disabling the port pin buffer eliminates the parasitic current flow and
therefore reduces overall current consumption. The ADC10AEx bits provide the ability to disable the port
pin input and output buffers.
; P2.3 on MSP430F22xx device configured for analog input
BIS.B #08h,&ADC10AE0 ; P2.3 ADC10 function and enable
Devices which don’t have all the ADC10 external inputs channels Ax or V
eREF+
/V
REF+
and V
eREF-
/
VREF-
available at device pins must not alter the default register bit configuration of the not available pins. See
device specific data sheet.
22.2.3 Voltage Reference Generator
The ADC10 module contains a built-in voltage reference with two selectable voltage levels. Setting
REFON = 1 enables the internal reference. When REF2_5V = 1, the internal reference is 2.5 V. When
REF2_5V = 0, the reference is 1.5 V. The internal reference voltage may be used internally (REFOUT = 0)
and, when REFOUT = 1, externally on pin V
REF+
. REFOUT = 1 should only be used if the pins V
REF+
and
V
REF-
are available as device pins.
External references may be supplied for V
R+
and V
R-
through pins A4 and A3 respectively. When external
references are used, or when V
CC
is used as the reference, the internal reference may be turned off to
save power.
An external positive reference V
eREF+
can be buffered by setting SREF0 = 1 and SREF1 = 1 (only devices
with V
eREF+
pin). This allows using an external reference with a large internal resistance at the cost of the
buffer current. When REFBURST = 1 the increased current consumption is limited to the sample and
conversion period.
External storage capacitance is not required for the ADC10 reference source as on the ADC12.
22.2.3.1 Internal Reference Low-Power Features
The ADC10 internal reference generator is designed for low power applications. The reference generator
includes a band-gap voltage source and a separate buffer. The current consumption of each is specified
separately in the device-specific data sheet. When REFON = 1, both are enabled and when REFON = 0
both are disabled. The total settling time when REFON becomes set is approximately 30 µs.
When REFON = 1, but no conversion is active, the buffer is automatically disabled and automatically re-
enabled when needed. When the buffer is disabled, it consumes no current. In this case, the bandgap
voltage source remains enabled.
When REFOUT = 1, the REFBURST bit controls the operation of the internal reference buffer. When
REFBURST = 0, the buffer is on continuously, allowing the reference voltage to be present outside the
device continuously. When REFBURST = 1, the buffer is automatically disabled when the ADC10 is not
actively converting and is automatically re-enabled when needed.
The internal reference buffer also has selectable speed versus power settings. When the maximum
conversion rate is below 50 ksps, setting ADC10SR = 1 reduces the current consumption of the buffer
approximately 50%.
22.2.4 Auto Power-Down
The ADC10 is designed for low power applications. When the ADC10 is not actively converting, the core is
automatically disabled and is automatically re-enabled when needed. The ADC10OSC is also
automatically enabled when needed and disabled when not needed. When the core or oscillator is
disabled, it consumes no current.
537
SLAU144JDecember 2004Revised July 2013 ADC10
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