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OA Operation
20.2.4.1 General Purpose Opamp Mode
In this mode the feedback resistor ladder is isolated from the OAx and the OAxCTL0 bits define the signal
routing. The OAx inputs are selected with the OAPx and OANx bits. The OAx output is connected to the
ADC input channel as selected by the OAxCTL0 bits.
20.2.4.2 Unity Gain Mode for Differential Amplifier
In this mode the output of the OAx is connected to the inverting input of the OAx providing a unity gain
buffer. The non-inverting input is selected by the OAPx bits. The external connection for the inverting input
is disabled and the OANx bits are don’t care. The output of the OAx is also routed through the resistor
ladder as part of the three-opamp differential amplifier. This mode is only for construction of the three-
opamp differential amplifier.
20.2.4.3 Unity Gain Mode
In this mode the output of the OAx is connected to the inverting input of the OAx providing a unity gain
buffer. The non-inverting input is selected by the OAPx bits. The external connection for the inverting input
is disabled and the OANx bits are don’t care. The OAx output is connected to the ADC input channel as
selected by the OAxCTL0 bits.
20.2.4.4 Comparator Mode
In this mode the output of the OAx is isolated from the resistor ladder. R
TOP
is connected to AV
SS
and
R
BOTTOM
is connected to AV
CC
when OARRIP = 0. When OARRIP = 1, the connection of the resistor ladder
is reversed. R
TOP
is connected to AV
CC
and R
BOTTOM
is connected to AV
SS.
The OAxTAP signal is connected
to the inverting input of the OAx providing a comparator with a programmable threshold voltage selected
by the OAFBRx bits. The non-inverting input is selected by the OAPx bits. Hysteresis can be added by an
external positive feedback resistor. The external connection for the inverting input is disabled and the
OANx bits are don’t care. The OAx output is connected to the ADC input channel as selected by the
OAxCTL0 bits.
20.2.4.5 Non-Inverting PGA Mode
In this mode the output of the OAx is connected to R
TOP
and R
BOTTOM
is connected to AV
SS
. The OAxTAP
signal is connected to the inverting input of the OAx providing a non-inverting amplifier configuration with a
programmable gain of [1+OAxTAP ratio]. The OAxTAP ratio is selected by the OAFBRx bits. If the
OAFBRx bits = 0, the gain is unity. The non-inverting input is selected by the OAPx bits. The external
connection for the inverting input is disabled and the OANx bits are don’t care. The OAx output is
connected to the ADC input channel as selected by the OAxCTL0 bits.
20.2.4.6 Cascaded Non-Inverting PGA Mode
This mode allows internal routing of the OA signals to cascade two or three OA in non-inverting mode. In
this mode the non-inverting input of the OAx is connected to OA2OUT (OA0), OA0OUT (OA1), or
OA1OUT (OA2) when OAPx = 11. The OAx outputs are connected to the ADC input channel as selected
by the OAxCTL0 bits.
20.2.4.7 Inverting PGA Mode
In this mode the output of the OAx is connected to R
TOP
and R
BOTTOM
is connected to an analog multiplexer
that multiplexes the OAxI0, OAxI1, OAxIA, or the output of one of the remaining OAs, selected with the
OANx bits. The OAxTAP signal is connected to the inverting input of the OAx providing an inverting
amplifier with a gain of -OAxTAP ratio. The OAxTAP ratio is selected by the OAFBRx bits. The non-
inverting input is selected by the OAPx bits. The OAx output is connected to the ADC input channel as
selected by the OAxCTL0 bits.
515
SLAU144J–December 2004–Revised July 2013 OA
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