Datasheet

Bit Start
mX
BRCLK
88
UCLKI
ACLK
SMCLK
SMCLK
11
BITCLK
10
01
00
2
0
2
7
2
8
2
15
Compare (0 or 1)
Modulation Data Shift Register
(LSB first)
16−Bit Counter
Q0
............
Q15
m0m7
...
...
8
UxBR1 UxBR0
Toggle
FF
N =
R
R
R
UxMCTL
+0 or 1
SSEL1 SSEL0
Idle State
(Transmitter
Enabled)
Transmit
Disable
Transmission
Active
UTXEx = 0
No Data Written
to Transmit Buffer
Not Completed
UTXEx = 1
UTXEx = 0
UTXEx = 1
Data Written to
Transmit Buffer
Handle Interrupt
Conditions
Character
Transmitted
UTXEx = 1
UTXEx = 0 And Last Buffer Entry Is Transmitted
www.ti.com USART Operation: UART Mode
Figure 18-6. State Diagram of Transmitter Enable
When the transmitter is enabled (UTXEx = 1), data should not be written to UxTXBUF unless it is ready
for new data indicated by UTXIFGx = 1. Violation can result in an erroneous transmission if data in
UxTXBUF is modified as it is being moved into the TX shift register.
It is recommended that the transmitter be disabled (UTXEx = 0) only after any active transmission is
complete. This is indicated by a set transmitter empty bit (TXEPT = 1). Any data written to UxTXBUF while
the transmitter is disabled are held in the buffer but are not moved to the transmit shift register or
transmitted. Once UTXEx is set, the data in the transmit buffer is immediately loaded into the transmit shift
register and character transmission resumes.
18.2.6 USART Baud Rate Generation
The USART baud rate generator is capable of producing standard baud rates from non-standard source
frequencies. The baud rate generator uses one prescaler/divider and a modulator as shown in Figure 18-
7. This combination supports fractional divisors for baud rate generation. The maximum USART baud rate
is one-third the UART source clock frequency BRCLK.
Figure 18-7. MSP430 Baud Rate Generator
Timing for each bit is shown in Figure 18-8. For each bit received, a majority vote is taken to determine
the bit value. These samples occur at the N/2-1, N/2, and N/2+1 BRCLK periods, where N is the number
of BRCLKs per BITCLK.
481
SLAU144J–December 2004–Revised July 2013 USART Peripheral Interface, UART Mode
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