Datasheet

ST Address SP ST Data SP ST Data SP
Blocks of
Characters
Idle Periods of 10 Bits or More
UTXDx/URXDx Expanded
UTXDx/URXDx
First Character Within Block
Is Address. It Follows Idle
Period of 10 Bits or More
Character Within Block
Idle Period Less Than 10 Bits
Character Within Block
UTXDx/URXDx
USART Operation: UART Mode www.ti.com
Figure 18-3. Idle-Line Format
The URXWIE bit is used to control data reception in the idle-line multiprocessor format. When the
URXWIE bit is set, all non-address characters are assembled but not transferred into the UxRXBUF, and
interrupts are not generated. When an address character is received, the receiver is temporarily activated
to transfer the character to UxRXBUF and sets the URXIFGx interrupt flag. Any applicable error flag is
also set. The user can then validate the received address.
If an address is received, user software can validate the address and must reset URXWIE to continue
receiving data. If URXWIE remains set, only address characters are received. The URXWIE bit is not
modified by the USART hardware automatically.
For address transmission in idle-line multiprocessor format, a precise idle period can be generated by the
USART to generate address character identifiers on UTXDx. The wake-up temporary (WUT) flag is an
internal flag double-buffered with the user-accessible TXWAKE bit. When the transmitter is loaded from
UxTXBUF, WUT is also loaded from TXWAKE resetting the TXWAKE bit.
The following procedure sends out an idle frame to indicate an address character follows:
1. Set TXWAKE, then write any character to UxTXBUF. UxTXBUF must be ready for new data
(UTXIFGx = 1).
The TXWAKE value is shifted to WUT and the contents of UxTXBUF are shifted to the transmit shift
register when the shift register is ready for new data. This sets WUT, which suppresses the start, data,
and parity bits of a normal transmission, then transmits an idle period of exactly 11 bits. When two stop
bits are used for the idle line, the second stop bit is counted as the first mark bit of the idle period.
TXWAKE is reset automatically.
2. Write desired address character to UxTXBUF. UxTXBUF must be ready for new data (UTXIFGx = 1).
The new character representing the specified address is shifted out following the address-identifying
idle period on UTXDx. Writing the first "don't care" character to UxTXBUF is necessary in order to shift
the TXWAKE bit to WUT and generate an idle-line condition. This data is discarded and does not
appear on UTXDx.
18.2.3.2 Address-Bit Multiprocessor Format
When MM = 1, the address-bit multiprocessor format is selected. Each processed character contains an
extra bit used as an address indicator shown in Figure 18-4. The first character in a block of characters
carries a set address bit which indicates that the character is an address. The USART RXWAKE bit is set
when a received character is a valid address character and is transferred to UxRXBUF.
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USART Peripheral Interface, UART Mode SLAU144J–December 2004–Revised July 2013
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