Datasheet

[Parity Bit, PENA = 1]
[Address Bit, MM = 1]
Mark
Space
D0 D6 D7 AD PA SP SP
[Optional Bit, Condition]
[2nd Stop Bit, SPB = 1]
[8th Data Bit, CHAR = 1]
ST
www.ti.com USART Operation: UART Mode
NOTE: Initializing or Reconfiguring the USART Module
The required USART initialization/reconfiguration process is:
1. Set SWRST (BIS.B #SWRST,&UxCTL)
2. Initialize all USART registers with SWRST = 1 (including UxCTL)
3. Enable USART module via the MEx SFRs (URXEx and/or UTXEx)
4. Clear SWRST via software (BIC.B #SWRST,&UxCTL)
5. Enable interrupts (optional) via the IEx SFRs (URXIEx and/or UTXIEx)
Failure to follow this process may result in unpredictable USART behavior.
18.2.2 Character Format
The UART character format, shown in Figure 18-2, consists of a start bit, seven or eight data bits, an
even/odd/no parity bit, an address bit (address-bit mode), and one or two stop bits. The bit period is
defined by the selected clock source and setup of the baud rate registers.
Figure 18-2. Character Format
18.2.3 Asynchronous Communication Formats
When two devices communicate asynchronously, the idle-line format is used for the protocol. When three
or more devices communicate, the USART supports the idle-line and address-bit multiprocessor
communication formats.
18.2.3.1 Idle-Line Multiprocessor Format
When MM = 0, the idle-line multiprocessor format is selected. Blocks of data are separated by an idle time
on the transmit or receive lines as shown in Figure 18-3. An idle receive line is detectedwhen 10 or more
continuous ones (marks) are received after the first stop bit of a character. When two stop bits are used
for the idle line the second stop bit is counted as the first mark bit of the idle period.
The first character received after an idle period is an address character. The RXWAKE bit is used as an
address tag for each block of characters. In the idle-line multiprocessor format, this bit is set when a
received character is an address and is transferred to UxRXBUF.
477
SLAU144J–December 2004–Revised July 2013 USART Peripheral Interface, UART Mode
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