Datasheet

Receiver Shift Register
Transmit Shift Register
Receiver Buffer UxRXBUF
Transmit Buffer UxTXBUF
LISTEN MM
UCLK
Clock Phase and Polarity
Receive Status
SYNC CKPH CKPL
SSEL1 SSEL0
UCLKI
ACLK
SMCLK
SMCLK
00
01
10
11
OEPE BRK
TXWAKE
UCLKS
UCLKI
Receive Control
RXERR
FE
SWRST URXEx* URXEIE
URXWIE
Transmit Control
SWRST UTXEx* TXEPT
RXWAKE
SPB CHAR PENAPEV
SPB CHAR PENAPEV
WUT
UTXD
URXD
SOMI
STE
Prescaler/Divider UxBRx
Modulator UxMCTL
Baud−Rate Generator
UTXIFGx*
* See the device-specific data sheet for SFR locations.
SYNC
URXIFGx*
01
0
0
0
0
1
1
1
1
SIMO
1
0
STC
SYNC= 0
USART Operation: UART Mode www.ti.com
Figure 18-1. USART Block Diagram: UART Mode
18.2 USART Operation: UART Mode
In UART mode, the USART transmits and receives characters at a bit rate asynchronous to another
device. Timing for each character is based on the selected baud rate of the USART. The transmit and
receive functions use the same baud rate frequency.
18.2.1 USART Initialization and Reset
The USART is reset by a PUC or by setting the SWRST bit. After a PUC, the SWRST bit is automatically
set, keeping the USART in a reset condition. When set, the SWRST bit resets the URXIEx, UTXIEx,
URXIFGx, RXWAKE, TXWAKE, RXERR, BRK, PE, OE, and FE bits and sets the UTXIFGx and TXEPT
bits. The receive and transmit enable flags, URXEx and UTXEx, are not altered by SWRST. Clearing
SWRST releases the USART for operation. See also chapter USART Module, I
2
C mode for USART0
when reconfiguring from I
2
C mode to UART mode.
476
USART Peripheral Interface, UART Mode SLAU144J–December 2004–Revised July 2013
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