Datasheet

Unused

High Byte Low Byte

Byte

High Byte Low Byte

Byte

Byte-Register Operation

Memory

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Addressing Modes

The assembler uses the constant generator automatically if one of the six constants is used as an

immediate source operand. Registers R2 and R3, used in the constant mode, cannot be addressed

explicitly; they act as source-only registers.

3.2.4.1 Constant Generator - Expanded Instruction Set

The RISC instruction set of the MSP430 has only 27 instructions. However, the constant generator allows

the MSP430 assembler to support 24 additional, emulated instructions. For example, the single-operand

instruction

CLR dst

is emulated by the double-operand instruction with the same length:

MOV R3,dst

where the #0 is replaced by the assembler, and R3 is used with As=00.

INC dst

is replaced by:

ADD 0(R3),dst

3.2.5 General-Purpose Registers R4 to R15

The twelve registers, R4-R15, are general-purpose registers. All of these registers can be used as data

registers, address pointers, or index values and can be accessed with byte or word instructions as shown

in Figure 3-7.

Figure 3-7. Register-Byte/Byte-Register Operations

Example Register-Byte Operation Example Byte-Register Operation

R5 = 0A28Fh R5 = 01202h

R6 = 0203h R6 = 0223h

Mem(0203h) = 012h Mem(0223h) = 05Fh

ADD.B R5,0(R6) ADD.B @R6,R5

08Fh 05Fh

+ 012h + 002h

0A1h 00061h

Mem (0203h) = 0A1h R5 = 00061h

C = 0, Z = 0, N = 1 C = 0, Z = 0, N = 0

(Low byte of register) (Addressed byte)

+ (Addressed byte) + (Low byte of register)

->(Addressed byte) ->(Low byte of register, zero to High byte)

3.3 Addressing Modes

Seven addressing modes for the source operand and four addressing modes for the destination operand

can address the complete address space with no exceptions. The bit numbers in Table 3-3 describe the

contents of the As (source) and Ad (destination) mode bits.

SLAU144J–December 2004–Revised July 2013 CPU

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