Datasheet

USCI Registers: I

C Mode

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17.4.1 UCBxCTL0, USCI_Bx Control Register 0

7 6 5 4 3 2 1 0

UCA10 UCSLA10 UCMM Unused UCMST UCMODEx=11 UCSYNC=1

rw-0 rw-0 rw-0 rw-0 rw-0 rw-0 rw-0 r-1

UCA10 Bit 7 Own addressing mode select

0 Own address is a 7-bit address

1 Own address is a 10-bit address

UCSLA10 Bit 6 Slave addressing mode select

0 Address slave with 7-bit address

1 Address slave with 10-bit address

UCMM Bit 5 Multi-master environment select

0 Single master environment. There is no other master in the system. The address compare unit is

disabled.

1 Multi-master environment

Unused Bit 4 Unused

UCMST Bit 3 Master mode select. When a master loses arbitration in a multi-master environment (UCMM = 1) the

UCMST bit is automatically cleared and the module acts as slave.

0 Slave mode

1 Master mode

UCMODEx Bits 2-1 USCI Mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1.

00 3-pin SPI

01 4-pin SPI (master/slave enabled if STE = 1)

10 4-pin SPI (master/slave enabled if STE = 0)

11 I

C mode

UCSYNC Bit 0 Synchronous mode enable

0 Asynchronous mode

1 Synchronous mode

468

SLAU144J–December 2004–Revised July 2013

Universal Serial Communication Interface, I

C Mode

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