Datasheet

CPU Registers
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Figure 3-6. Status Register Bits
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
OSC CPU
Reserved V SCG1 SCG0 GIE N Z C
OFF OFF
rw-0 rw-0 rw-0 rw-0 rw-0 rw-0 rw-0 rw-0 rw-0 rw-0
Table 3-1 describes the status register bits.
Table 3-1. Description of Status Register Bits
Bit Description
V Overflow bit. This bit is set when the result of an arithmetic operation overflows the signed-variable range.
Set when:
ADD(.B),ADDC(.B)
Positive + Positive = Negative
Negative + Negative = Positive
Otherwise reset
Set when:
SUB(.B),SUBC(.B),CMP(.B)
Positive – Negative = Negative
Negative – Positive = Positive
Otherwise reset
SCG1 System clock generator 1. When set, turns off the SMCLK.
SCG0 System clock generator 0. When set, turns off the DCO dc generator, if DCOCLK is not used for MCLK or SMCLK.
OSCOFF Oscillator Off. When set, turns off the LFXT1 crystal oscillator, when LFXT1CLK is not use for MCLK or SMCLK.
CPUOFF CPU off. When set, turns off the CPU.
GIE General interrupt enable. When set, enables maskable interrupts. When reset, all maskable interrupts are disabled.
N Negative bit. Set when the result of a byte or word operation is negative and cleared when the result is not negative.
Word operation: N is set to the value of bit 15 of the result.
Byte operation: N is set to the value of bit 7 of the result.
Z Zero bit. Set when the result of a byte or word operation is 0 and cleared when the result is not 0.
C Carry bit. Set when the result of a byte or word operation produced a carry and cleared when no carry occurred.
3.2.4 Constant Generator Registers CG1 and CG2
Six commonly-used constants are generated with the constant generator registers R2 and R3, without
requiring an additional 16-bit word of program code. The constants are selected with the source-register
addressing modes (As), as described in Table 3-2.
Table 3-2. Values of Constant Generators CG1, CG2
Register As Constant Remarks
R2 00 – – – – Register mode
R2 01 (0) Absolute address mode
R2 10 00004h +4, bit processing
R2 11 00008h +8, bit processing
R3 00 00000h 0, word processing
R3 01 00001h +1
R3 10 00002h +2, bit processing
R3 11 0FFFFh -1, word processing
The constant generator advantages are:
No special instructions required
No additional code word for the six constants
No code memory access required to retrieve the constant
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CPU SLAU144JDecember 2004Revised July 2013
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