Datasheet
SDA
SCL
MSB Acknowledgement
Signal From Receiver
Acknowledgement
Signal From Receiver
1 2 7 8 9 1 2 8 9
ACK ACK
START
Condition (S)
STOP
Condition (P)
R/W
MSP430
V
CC
Serial Data (SDA)
Serial Clock (SCL)
Device A
Device B
Device C
USCI Operation: I
2
C Mode
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Figure 17-2. I
2
C Bus Connection Diagram
17.3.1 USCI Initialization and Reset
The USCI is reset by a PUC or by setting the UCSWRST bit. After a PUC, the UCSWRST bit is
automatically set, keeping the USCI in a reset condition. To select I
2
C operation the UCMODEx bits must
be set to 11. After module initialization, it is ready for transmit or receive operation. Clearing UCSWRST
releases the USCI for operation.
Configuring and reconfiguring the USCI module should be done when UCSWRST is set to avoid
unpredictable behavior. Setting UCSWRST in I
2
C mode has the following effects:
• I
2
C communication stops
• SDA and SCL are high impedance
• UCBxI2CSTAT, bits 6-0 are cleared
• UCBxTXIE and UCBxRXIE are cleared
• UCBxTXIFG and UCBxRXIFG are cleared
• All other bits and registers remain unchanged.
NOTE: Initializing or Reconfiguring the USCI Module
The recommended USCI initialization or reconfiguration process is:
1. Set UCSWRST (BIS.B #UCSWRST,&UCxCTL1)
2. Initialize all USCI registers with UCSWRST=1 (including UCxCTL1)
3. Configure ports.
4. Clear UCSWRST via software (BIC.B #UCSWRST,&UCxCTL1)
5. Enable interrupts (optional) via UCxRXIE and/or UCxTXIE
17.3.2 I
2
C Serial Data
One clock pulse is generated by the master device for each data bit transferred. The I
2
C mode operates
with byte data. Data is transferred most significant bit first as shown in Figure 17-3.
The first byte after a START condition consists of a 7-bit slave address and the R/W bit. When R/W = 0,
the master transmits data to a slave. When R/W = 1, the master receives data from a slave. The ACK bit
is sent from the receiver after each byte on the 9th SCL clock.
Figure 17-3. I
2
C Module Data Transfer
452
SLAU144J–December 2004–Revised July 2013
Universal Serial Communication Interface, I
2
C Mode
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