Datasheet

CKPH CKPL
Cycle#
UCxCLK
UCxCLK
UCxCLK
UCxCLK
UCxSIMO
UCxSOMI
UCxSIMO
UCxSOMI
Move to UCxTXBUF
RX Sample Points
0
1
0
0
01
1 1
0 X
1 X
MSB
MSB
1 2 3 4 5 6 7 8
LSB
LSB
TX Data Shifted Out
UCxSTE
UC UC
USCI Operation: SPI Mode www.ti.com
16.3.6.1 Serial Clock Polarity and Phase
The polarity and phase of UCxCLK are independently configured via the UCCKPL and UCCKPH control
bits of the USCI. Timing for each case is shown in Figure 16-4.
Figure 16-4. USCI SPI Timing with UCMSB = 1
16.3.7 Using the SPI Mode With Low-Power Modes
The USCI module provides automatic clock activation for SMCLK for use with low-power modes. When
SMCLK is the USCI clock source, and is inactive because the device is in a low-power mode, the USCI
module automatically activates it when needed, regardless of the control-bit settings for the clock source.
The clock remains active until the USCI module returns to its idle condition. After the USCI module returns
to the idle condition, control of the clock source reverts to the settings of its control bits. Automatic clock
activation is not provided for ACLK.
When the USCI module activates an inactive clock source, the clock source becomes active for the whole
device and any peripheral configured to use the clock source may be affected. For example, a timer using
SMCLK increments while the USCI module forces SMCLK active.
In SPI slave mode, no internal clock source is required because the clock is provided by the external
master. It is possible to operate the USCI in SPI slave mode while the device is in LPM4 and all clock
sources are disabled. The receive or transmit interrupt can wake up the CPU from any low power mode.
16.3.8 SPI Interrupts
The USCI has one interrupt vector for transmission and one interrupt vector for reception.
16.3.8.1 SPI Transmit Interrupt Operation
The UCxTXIFG interrupt flag is set by the transmitter to indicate that UCxTXBUF is ready to accept
another character. An interrupt request is generated if UCxTXIE and GIE are also set. UCxTXIFG is
automatically reset if a character is written to UCxTXBUF. UCxTXIFG is set after a PUC or when
UCSWRST = 1. UCxTXIE is reset after a PUC or when UCSWRST = 1.
NOTE: Writing to UCxTXBUF in SPI Mode
Data written to UCxTXBUF when UCxTXIFG = 0 may result in erroneous data transmission.
442
Universal Serial Communication Interface, SPI Mode SLAU144J–December 2004–Revised July 2013
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