Datasheet
USCI Registers: UART Mode
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15.4.2 UCAxCTL1, USCI_Ax Control Register 1
7 6 5 4 3 2 1 0
UCSSELx UCRXEIE UCBRKIE UCDORM UCTXADDR UCTXBRK UCSWRST
rw-0 rw-0 rw-0 rw-0 rw-0 rw-0 rw-0 rw-1
UCSSELx Bits 7-6 USCI clock source select. These bits select the BRCLK source clock.
00 UCLK
01 ACLK
10 SMCLK
11 SMCLK
UCRXEIE Bit 5 Receive erroneous-character interrupt-enable
0 Erroneous characters rejected and UCAxRXIFG is not set
1 Erroneous characters received will set UCAxRXIFG
UCBRKIE Bit 4 Receive break character interrupt-enable
0 Received break characters do not set UCAxRXIFG.
1 Received break characters set UCAxRXIFG.
UCDORM Bit 3 Dormant. Puts USCI into sleep mode.
0 Not dormant. All received characters will set UCAxRXIFG.
1 Dormant. Only characters that are preceded by an idle-line or with address bit set will set
UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break
and synch field will set UCAxRXIFG.
UCTXADDR Bit 2 Transmit address. Next frame to be transmitted will be marked as address depending on the selected
multiprocessor mode.
0 Next frame transmitted is data
1 Next frame transmitted is an address
UCTXBRK Bit 1 Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic
baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields.
Otherwise 0h must be written into the transmit buffer.
0 Next frame transmitted is not a break
1 Next frame transmitted is a break or a break/synch
UCSWRST Bit 0 Software reset enable
0 Disabled. USCI reset released for operation.
1 Enabled. USCI logic held in reset state.
15.4.3 UCAxBR0, USCI_Ax Baud Rate Control Register 0
7 6 5 4 3 2 1 0
UCBRx
rw rw rw rw rw rw rw rw
15.4.4 UCAxBR1, USCI_Ax Baud Rate Control Register 1
7 6 5 4 3 2 1 0
UCBRx
rw rw rw rw rw rw rw rw
UCBRx 7-0 Clock prescaler setting of the Baud rate generator. The 16-bit value of (UCAxBR0 + UCAxBR1 × 256) forms
the prescaler value.
430
Universal Serial Communication Interface, UART Mode SLAU144J–December 2004–Revised July 2013
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