Datasheet

URXDx
URXS
t
τ
Majority Vote Taken
URXDx
URXS
t
τ
www.ti.com USCI Operation: UART Mode
15.3.7.1 Receive Data Glitch Suppression
Glitch suppression prevents the USCI from being accidentally started. Any glitch on UCAxRXD shorter
than the deglitch time t
τ
(approximately 150 ns) will be ignored by the USCI and further action will be
initiated as shown in Figure 15-8. See the device-specific data sheet for parameters.
Figure 15-8. Glitch Suppression, USCI Receive Not Started
When a glitch is longer than t
τ
or a valid start bit occurs on UCAxRXD, the USCI receive operation is
started and a majority vote is taken as shown in Figure 15-9. If the majority vote fails to detect a start bit
the USCI halts character reception.
Figure 15-9. Glitch Suppression, USCI Activated
15.3.8 USCI Transmit Enable
The USCI module is enabled by clearing the UCSWRST bit and the transmitter is ready and in an idle
state. The transmit baud rate generator is ready but is not clocked nor producing any clocks.
A transmission is initiated by writing data to UCAxTXBUF. When this occurs, the baud rate generator is
enabled and the data in UCAxTXBUF is moved to the transmit shift register on the next BITCLK after the
transmit shift register is empty. UCAxTXIFG is set when new data can be written into UCAxTXBUF.
Transmission continues as long as new data is available in UCAxTXBUF at the end of the previous byte
transmission. If new data is not in UCAxTXBUF when the previous byte has transmitted, the transmitter
returns to its idle state and the baud rate generator is turned off.
15.3.9 UART Baud Rate Generation
The USCI baud rate generator is capable of producing standard baud rates from non-standard source
frequencies. It provides two modes of operation selected by the UCOS16 bit.
15.3.9.1 Low-Frequency Baud Rate Generation
The low-frequency mode is selected when UCOS16 = 0. This mode allows generation of baud rates from
low frequency clock sources (for example, 9600 baud from a 32768-Hz crystal). By using a lower input
frequency the power consumption of the module is reduced. Using this mode with higher frequencies and
higher prescaler settings will cause the majority votes to be taken in an increasingly smaller window and
thus decrease the benefit of the majority vote.
In low-frequency mode the baud rate generator uses one prescaler and one modulator to generate bit
clock timing. This combination supports fractional divisors for baud rate generation. In this mode, the
maximum USCI baud rate is one-third the UART source clock frequency BRCLK.
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SLAU144J–December 2004–Revised July 2013 Universal Serial Communication Interface, UART Mode
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