Datasheet

USCI Operation: UART Mode www.ti.com
15.3.6 Automatic Error Detection
Glitch suppression prevents the USCI from being accidentally started. Any pulse on UCAxRXD shorter
than the deglitch time t
τ
(approximately 150 ns) will be ignored. See the device-specific data sheet for
parameters.
When a low period on UCAxRXD exceeds t
τ
a majority vote is taken for the start bit. If the majority vote
fails to detect a valid start bit the USCI halts character reception and waits for the next low period on
UCAxRXD. The majority vote is also used for each bit in a character to prevent bit errors.
The USCI module automatically detects framing errors, parity errors, overrun errors, and break conditions
when receiving characters. The bits UCFE, UCPE, UCOE, and UCBRK are set when their respective
condition is detected. When the error flags UCFE, UCPE or UCOE are set, UCRXERR is also set. The
error conditions are described in Table 15-1.
Table 15-1. Receive Error Conditions
Error Condition Error Flag Description
A framing error occurs when a low stop bit is detected. When two stop bits are used, both
Framing error UCFE
stop bits are checked for framing error. When a framing error is detected, the UCFE bit is set.
A parity error is a mismatch between the number of 1s in a character and the value of the
Parity error UCPE parity bit. When an address bit is included in the character, it is included in the parity
calculation. When a parity error is detected, the UCPE bit is set.
An overrun error occurs when a character is loaded into UCAxRXBUF before the prior
Receive overrun UCOE
character has been read. When an overrun occurs, the UCOE bit is set.
When not using automatic baud rate detection, a break is detected when all data, parity, and
Break condition UCBRK stop bits are low. When a break condition is detected, the UCBRK bit is set. A break condition
can also set the interrupt flag UCAxRXIFG if the break interrupt enable UCBRKIE bit is set.
When UCRXEIE = 0 and a framing error, or parity error is detected, no character is received into
UCAxRXBUF. When UCRXEIE = 1, characters are received into UCAxRXBUF and any applicable error
bit is set.
When UCFE, UCPE, UCOE, UCBRK, or UCRXERR is set, the bit remains set until user software resets it
or UCAxRXBUF is read. UCOE must be reset by reading UCAxRXBUF. Otherwise it will not function
properly. To detect overflows reliably, the following flow is recommended. After a character is received
and UCAxRXIFG is set, first read UCAxSTAT to check the error flags including the overflow flag UCOE.
Read UCAxRXBUF next. This will clear all error flags except UCOE, if UCAxRXBUF was overwritten
between the read access to UCAxSTAT and to UCAxRXBUF. The UCOE flag should be checked after
reading UCAxRXBUF to detect this condition. Note that, in this case, the UCRXERR flag is not set.
15.3.7 USCI Receive Enable
The USCI module is enabled by clearing the UCSWRST bit and the receiver is ready and in an idle state.
The receive baud rate generator is in a ready state but is not clocked nor producing any clocks.
The falling edge of the start bit enables the baud rate generator and the UART state machine checks for a
valid start bit. If no valid start bit is detected the UART state machine returns to its idle state and the baud
rate generator is turned off again. If a valid start bit is detected a character will be received.
When the idle-line multiprocessor mode is selected with UCMODEx = 01 the UART state machine checks
for an idle line after receiving a character. If a start bit is detected another character is received. Otherwise
the UCIDLE flag is set after 10 ones are received and the UART state machine returns to its idle state and
the baud rate generator is turned off.
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Universal Serial Communication Interface, UART Mode SLAU144J–December 2004–Revised July 2013
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