Datasheet

USI Operation
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14.2.4 I
2
C Mode
The USI module is configured in I
2
C mode when USII2C =1, USICKPL = 1, and USICKPH = 0. For I
2
C
data compatibility, USILSB and USI16B must be cleared. USIPE6 and USIPE7 must be set to enable the
SCL and SDA port functions.
14.2.4.1 I
2
C Master Mode
To configure the USI module as an I
2
C master the USIMST bit must be set. In master mode, clocks are
generated by the USI module and output to the SCL line while USIIFG = 0. When USIIFG = 1, the SCL
will stop at the idle, or high, level. Multi-master operation is supported as described in the Arbitration
section.
The master supports slaves that are holding the SCL line low only when USIDIVx > 0. When USIDIVx is
set to /1 clock division (USIDIVx = 0), connected slaves must not hold the SCL line low during data
transmission. Otherwise the communication may fail.
14.2.4.2 I
2
C Slave Mode
To configure the USI module as an I
2
C slave the USIMST bit must be cleared. In slave mode, SCL is held
low if USIIFG = 1, USISTTIFG = 1 or if USICNTx = 0. USISTTIFG must be cleared by software after the
slave is setup and ready to receive the slave address from a master.
14.2.4.3 I
2
C Transmitter
In transmitter mode, data is first loaded into USISRL. The output is enabled by setting USIOE and the
transmission is started by writing 8 into USICNTx. This clears USIIFG and SCL is generated in master
mode or released from being held low in slave mode. After the transmission of all 8 bits, USIIFG is set,
and the clock signal on SCL is stopped in master mode or held low at the next low phase in slave mode.
To receive the I
2
C acknowledgment bit, the USIOE bit is cleared with software and USICNTx is loaded
with 1. This clears USIIFG and one bit is received into USISRL. When USIIFG becomes set again, the
LSB of USISRL is the received acknowledge bit and can be tested in software.
; Receive ACK/NACK
BIC.B #USIOE,&USICTL0 ; SDA input
MOV.B #01h,&USICNT ; USICNTx = 1
TEST_USIIFG
BIT.B #USIIFG,&USICTL1 ; Test USIIFG
JZ TEST_USIIFG
BIT.B #01h,&USISRL ; Test received ACK bit
JNZ HANDLE_NACK ; Handle if NACK
...Else, handle ACK
402
Universal Serial Interface (USI) SLAU144JDecember 2004Revised July 2013
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