Datasheet

0h
EQU0 Interrupt
TBCL0a
TBCL0b TBCL0c
TBCL0d
t
1
t
0
t
0
TBCL1a
TBCL1b TBCL1c
TBCL1d
t
1
t
1
t
0
EQU1 Interrupt
TBR
(max)
TBR
(max)
−1 TBR
(max)
0h
Timer Clock
Timer
Set TBIFG
1h TBR
(max)
0hTBR
(max)
−1
www.ti.com Timer_B Operation
Figure 13-5. Continuous Mode Flag Setting
13.2.3.4 Use of the Continuous Mode
The continuous mode can be used to generate independent time intervals and output frequencies. Each
time an interval is completed, an interrupt is generated. The next time interval is added to the TBCLx latch
in the interrupt service routine. Figure 13-6 shows two separate time intervals t
0
and t
1
being added to the
capture/compare registers. The time interval is controlled by hardware, not software, without impact from
interrupt latency. Up to three (Timer_B3) or 7 (Timer_B7) independent time intervals or output frequencies
can be generated using capture/compare registers.
Figure 13-6. Continuous Mode Time Intervals
Time intervals can be produced with other modes as well, where TBCL0 is used as the period register.
Their handling is more complex since the sum of the old TBCLx data and the new period can be higher
than the TBCL0 value. When the sum of the previous TBCLx value plus t
x
is greater than the TBCL0 data,
TBCL0 + 1 must be subtracted to obtain the correct time interval.
13.2.3.5 Up/Down Mode
The up/down mode is used if the timer period must be different from TBR
(max)
counts, and if a symmetrical
pulse generation is needed. The timer repeatedly counts up to the value of compare latch TBCL0, and
back down to zero, as shown in Figure 13-7. The period is twice the value in TBCL0.
NOTE: TBCL0 > TBR(max)
If TBCL0 > TBR
(max),
the counter operates as if it were configured for continuous mode. It
does not count down from TBR
(max)
to zero.
379
SLAU144J–December 2004–Revised July 2013 Timer_B
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