Datasheet

0h
0FFFFh
EQU0
TAIFG
Output Mode 1: Set
Output Mode 2:Toggle/Reset
Output Mode 3: Set/Reset
Output Mode 4:Toggle
Output Mode 5: Reset
Output Mode 6:Toggle/Set
Output Mode 7: Reset/Set
TACCR0
TACCR1
EQU1 EQU0
TAIFG
EQU1 EQU0
TAIFG
Interrupt Events
Timer_A Operation www.ti.com
Table 12-2. Output Modes
OUTMODx Mode Description
The output signal OUTx is defined by the OUTx bit. The OUTx signal updates immediately
000 Output
when OUTx is updated.
The output is set when the timer counts to the TACCRx value. It remains set until a reset of
001 Set
the timer, or until another output mode is selected and affects the output.
The output is toggled when the timer counts to the TACCRx value. It is reset when the timer
010 Toggle/Reset
counts to the TACCR0 value.
The output is set when the timer counts to the TACCRx value. It is reset when the timer
011 Set/Reset
counts to the TACCR0 value.
The output is toggled when the timer counts to the TACCRx value. The output period is
100 Toggle
double the timer period.
The output is reset when the timer counts to the TACCRx value. It remains reset until another
101 Reset
output mode is selected and affects the output.
The output is toggled when the timer counts to the TACCRx value. It is set when the timer
110 Toggle/Set
counts to the TACCR0 value.
The output is reset when the timer counts to the TACCRx value. It is set when the timer
111 Reset/Set
counts to the TACCR0 value.
12.2.5.2 Output Example — Timer in Up Mode
The OUTx signal is changed when the timer counts up to the TACCRx value, and rolls from TACCR0 to
zero, depending on the output mode. An example is shown in Figure 12-12 using TACCR0 and TACCR1.
Figure 12-12. Output Example—Timer in Up Mode
364
Timer_A SLAU144J–December 2004–Revised July 2013
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