Datasheet

0h
TACCR0
0FFFFh
0FFFFh
TACCR0a
TACCR0b TACCR0c
TACCR0d
t
1
t
0
t
0
TACCR1a
TACCR1b TACCR1c
TACCR1d
t
1
t
1
t
0
Timer_A Operation www.ti.com
Figure 12-6. Continuous Mode Time Intervals
Time intervals can be produced with other modes as well, where TACCR0 is used as the period register.
Their handling is more complex since the sum of the old TACCRx data and the new period can be higher
than the TACCR0 value. When the previous TACCRx value plus t
x
is greater than the TACCR0 data,
TACCR0 + 1 must be subtracted to obtain the correct time interval.
12.2.3.5 Up/Down Mode
The up/down mode is used if the timer period must be different from 0FFFFh counts, and if a symmetrical
pulse generation is needed. The timer repeatedly counts up to the value of compare register TACCR0 and
back down to zero, as shown in Figure 12-7. The period is twice the value in TACCR0.
Figure 12-7. Up/Down Mode
The count direction is latched. This allows the timer to be stopped and then restarted in the same direction
it was counting before it was stopped. If this is not desired, the TACLR bit must be set to clear the
direction. The TACLR bit also clears the TAR value and the timer clock divider.
In up/down mode, the TACCR0 CCIFG interrupt flag and the TAIFG interrupt flag are set only once during
a period, separated by 1/2 the timer period. The TACCR0 CCIFG interrupt flag is set when the timer
counts from TACCR0 – 1 to TACCR0, and TAIFG is set when the timer completes counting down from
0001h to 0000h. Figure 12-8 shows the flag set cycle.
360
Timer_A SLAU144J–December 2004–Revised July 2013
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