Datasheet

Timer_A Introduction

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12.1 Timer_A Introduction

Timer_A is a 16-bit timer/counter with three capture/compare registers. Timer_A can support multiple

capture/compares, PWM outputs, and interval timing. Timer_A also has extensive interrupt capabilities.

Interrupts may be generated from the counter on overflow conditions and from each of the

capture/compare registers.

Timer_A features include:

• Asynchronous 16-bit timer/counter with four operating modes

• Selectable and configurable clock source

• Two or three configurable capture/compare registers

• Configurable outputs with PWM capability

• Asynchronous input and output latching

• Interrupt vector register for fast decoding of all Timer_A interrupts

The block diagram of Timer_A is shown in Figure 12-1.

NOTE: Use of the Word Count

Count is used throughout this chapter. It means the counter must be in the process of

counting for the action to take place. If a particular value is directly written to the counter,

then an associated action will not take place.

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Timer_A SLAU144J–December 2004–Revised July 2013

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