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Hardware Multiplier Operation
11.2.1 Operand Registers
The operand one register OP1 has four addresses, shown in Table 11-1, used to select the multiply mode.
Writing the first operand to the desired address selects the type of multiply operation but does not start
any operation. Writing the second operand to the operand two register OP2 initiates the multiply operation.
Writing OP2 starts the selected operation with the values stored in OP1 and OP2. The result is written into
the three result registers RESLO, RESHI, and SUMEXT.
Repeated multiply operations may be performed without reloading OP1 if the OP1 value is used for
successive operations. It is not necessary to re-write the OP1 value to perform the operations.
Table 11-1. OP1 Addresses
OP1 Address Register Name Operation
0130h MPY Unsigned multiply
0132h MPYS Signed multiply
0134h MAC Unsigned multiply accumulate
0136h MACS Signed multiply accumulate
11.2.2 Result Registers
The result low register RESLO holds the lower 16-bits of the calculation result. The result high register
RESHI contents depend on the multiply operation and are listed in Table 11-2.
Table 11-2. RESHI Contents
Mode RESHI Contents
MPY Upper 16-bits of the result
The MSB is the sign of the result. The remaining bits are the upper 15-bits of the result. Two's complement
MPYS
notation is used for the result.
MAC Upper 16-bits of the result
MACS Upper 16-bits of the result. Two's complement notation is used for the result.
The sum extension registers SUMEXT contents depend on the multiply operation and are listed in
Table 11-3.
Table 11-3. SUMEXT Contents
Mode SUMEXT
MPY SUMEXT is always 0000h
SUMEXT contains the extended sign of the result
MPYS 00000h = Result was positive or zero
0FFFFh = Result was negative
SUMEXT contains the carry of the result
MAC 0000h = No carry for result
0001h = Result has a carry
SUMEXT contains the extended sign of the result
MACS 00000h = Result was positive or zero
0FFFFh = Result was negative
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SLAU144JDecember 2004Revised July 2013 Hardware Multiplier
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