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Interrupts

2.2.1.1 Reset/NMI Pin

At power-up, the RST/NMI pin is configured in the reset mode. The function of the RST/NMI pins is

selected in the watchdog control register WDTCTL. If the RST/NMI pin is set to the reset function, the

CPU is held in the reset state as long as the RST/NMI pin is held low. After the input changes to a high

state, the CPU starts program execution at the word address stored in the reset vector, 0FFFEh, and the

RSTIFG flag is set.

If the RST/NMI pin is configured by user software to the NMI function, a signal edge selected by the

WDTNMIES bit generates an NMI interrupt if the NMIIE bit is set. The RST/NMI flag NMIIFG is also set.

NOTE: Holding RST/NMI Low

When configured in the NMI mode, a signal generating an NMI event should not hold the

RST/NMI pin low. If a PUC occurs from a different source while the NMI signal is low, the

device will be held in the reset state because a PUC changes the RST/NMI pin to the reset

function.

NOTE: Modifying WDTNMIES

When NMI mode is selected and the WDTNMIES bit is changed, an NMI can be generated,

depending on the actual level at the RST/NMI pin. When the NMI edge select bit is changed

before selecting the NMI mode, no NMI is generated.

2.2.1.2 Flash Access Violation

The flash ACCVIFG flag is set when a flash access violation occurs. The flash access violation can be

enabled to generate an NMI interrupt by setting the ACCVIE bit. The ACCVIFG flag can then be tested by

the NMI interrupt service routine to determine if the NMI was caused by a flash access violation.

2.2.1.3 Oscillator Fault

The oscillator fault signal warns of a possible error condition with the crystal oscillator. The oscillator fault

can be enabled to generate an NMI interrupt by setting the OFIE bit. The OFIFG flag can then be tested

by NMI the interrupt service routine to determine if the NMI was caused by an oscillator fault.

A PUC signal can trigger an oscillator fault, because the PUC switches the LFXT1 to LF mode, therefore

switching off the HF mode. The PUC signal also switches off the XT2 oscillator.

SLAU144J–December 2004–Revised July 2013 System Resets, Interrupts, and Operating Modes

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