Datasheet
BUSY
Programming Operation Active
Programming Time, V
CC
Current Consumption is Increased
t
Word Write
= 30/f
FTG
Generate
Programming Voltage
Remove
Programming Voltage
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Flash Memory Operation
7.3.3 Writing Flash Memory
The write modes, selected by the WRT and BLKWRT bits, are listed in Table 7-2.
Table 7-2. Write Modes
BLKWRT WRT Write Mode
0 1 Byte or word write
1 1 Block write
Both write modes use a sequence of individual write instructions, but using the block write mode is
approximately twice as fast as byte or word mode, because the voltage generator remains on for the
complete block write. Any instruction that modifies a destination can be used to modify a flash location in
either byte or word write mode or block write mode. A flash word (low and high bytes) must not be written
more than twice between erasures. Otherwise, damage can occur.
The BUSY bit is set while a write operation is active and cleared when the operation completes. If the
write operation is initiated from RAM, the CPU must not access flash while BUSY = 1. Otherwise, an
access violation occurs, ACCVIFG is set, and the flash write is unpredictable.
7.3.3.1 Byte or Word Write
A byte or word write operation can be initiated from within flash memory or from RAM. When initiating
from within flash memory, all timing is controlled by the flash controller, and the CPU is held while the
write completes. After the write completes, the CPU resumes code execution with the instruction following
the write. The byte or word write timing is shown in Figure 7-7.
Figure 7-7. Byte or Word Write Timing
When a byte or word write is executed from RAM, the CPU continues to execute code from RAM. The
BUSY bit must be zero before the CPU accesses flash again, otherwise an access violation occurs,
ACCVIFG is set, and the write result is unpredictable.
In byte or word mode, the internally-generated programming voltage is applied to the complete 64-byte
block, each time a byte or word is written, for 27 of the 30 f
FTG
cycles. With each byte or word write, the
amount of time the block is subjected to the programming voltage accumulates. The cumulative
programming time, t
CPT
, must not be exceeded for any block. If the cumulative programming time is met,
the block must be erased before performing any further writes to any address within the block. See the
device-specific data sheet for specifications.
315
SLAU144J–December 2004–Revised July 2013 Flash Memory Controller
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