Datasheet

t
(BOR)
V
CC(start)
V
CC
V
(B_IT−)
Set Signal for
POR circuitry
V
(B_IT+)
V
hys(B_IT−)
System Reset and Initialization www.ti.com
Figure 2-2. Brownout Timing
As the V
(B_IT-)
level is significantly above the V
min
level of the POR circuit, the BOR provides a reset for
power failures where V
CC
does not fall below V
min
. See device-specific data sheet for parameters.
2.1.2 Device Initial Conditions After System Reset
After a POR, the initial MSP430 conditions are:
• The RST/NMI pin is configured in the reset mode.
• I/O pins are switched to input mode as described in the Digital I/O chapter.
• Other peripheral modules and registers are initialized as described in their respective chapters in this
manual.
• Status register (SR) is reset.
• The watchdog timer powers up active in watchdog mode.
• Program counter (PC) is loaded with address contained at reset vector location (0FFFEh). If the reset
vectors content is 0FFFFh the device will be disabled for minimum power consumption.
2.1.2.1 Software Initialization
After a system reset, user software must initialize the MSP430 for the application requirements. The
following must occur:
• Initialize the SP, typically to the top of RAM.
• Initialize the watchdog to the requirements of the application.
• Configure peripheral modules to the requirements of the application.
Additionally, the watchdog timer, oscillator fault, and flash memory flags can be evaluated to determine
the source of the reset.
30
System Resets, Interrupts, and Operating Modes SLAU144J–December 2004–Revised July 2013
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