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DMA Operation

6.2.2 DMA Transfer Modes

The DMA controller has six transfer modes selected by the DMADTx bits as listed in Table 6-1. Each

channel is individually configurable for its transfer mode. For example, channel 0 may be configured in

single transfer mode, while channel 1 is configured for burst-block transfer mode, and channel 2 operates

in repeated block mode. The transfer mode is configured independently from the addressing mode. Any

addressing mode can be used with any transfer mode.

Two types of data can be transferred selectable by the DMAxCTL DSTBYTE and SRCBYTE fields. The

source and/or destination location can be either byte or word data. It is also possible to transfer byte to

byte, word to word or any combination.

Table 6-1. DMA Transfer Modes

DMADTx Transfer Mode Description

000 Single transfer Each transfer requires a trigger. DMAEN is automatically cleared when DMAxSZ

transfers have been made.

001 Block transfer A complete block is transferred with one trigger. DMAEN is automatically cleared

at the end of the block transfer.

010, 011 Burst-block transfer CPU activity is interleaved with a block transfer. DMAEN is automatically cleared

at the end of the burst-block transfer.

100 Repeated single transfer Each transfer requires a trigger. DMAEN remains enabled.

101 Repeated block transfer A complete block is transferred with one trigger. DMAEN remains enabled.

110, 111 Repeated burst-block transfer CPU activity is interleaved with a block transfer. DMAEN remains enabled.

291

SLAU144J–December 2004–Revised July 2013 DMA Controller

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