Datasheet

Basic Clock Module+ Registers www.ti.com
5.3.3 BCSCTL2, Basic Clock System Control Register 2
7 6 5 4 3 2 1 0
SELMx DIVMx SELS DIVSx DCOR
(1)(2)
rw-0 rw-0 rw-0 rw-0 rw-0 rw-0 rw-0 rw-0
SELMx Bits 7-6 Select MCLK. These bits select the MCLK source.
00 DCOCLK
01 DCOCLK
10 XT2CLK when XT2 oscillator present on-chip. LFXT1CLK or VLOCLK when XT2 oscillator not present
on-chip.
11 LFXT1CLK or VLOCLK
DIVMx Bits 5-4 Divider for MCLK
00 /1
01 /2
10 /4
11 /8
SELS Bit 3 Select SMCLK. This bit selects the SMCLK source.
0 DCOCLK
1 XT2CLK when XT2 oscillator present. LFXT1CLK or VLOCLK when XT2 oscillator not present
DIVSx Bits 2-1 Divider for SMCLK
00 /1
01 /2
10 /4
11 /8
DCOR Bit 0 DCO resistor select. Not available in all devices. See the device-specific data sheet.
0 Internal resistor
1 External resistor
(1)
Does not apply to MSP430x20xx or MSP430x21xx devices.
(2)
This bit is reserved in the MSP430AFE2xx devices.
284
Basic Clock Module+ SLAU144J–December 2004–Revised July 2013
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