Datasheet

Basic Clock Module+ Registers

www.ti.com

5.3 Basic Clock Module+ Registers

The basic clock module+ registers are listed in Table 5-1.

Table 5-1. Basic Clock Module+ Registers

DCO control register DCOCTL Read/write 056h 060h with PUC

Basic clock system control 1 BCSCTL1 Read/write 057h 087h with POR

(1)

Basic clock system control 2 BCSCTL2 Read/write 058h Reset with PUC

Basic clock system control 3 BCSCTL3 Read/write 053h 005h with PUC

(2)

SFR interrupt enable register 1 IE1 Read/write 000h Reset with PUC

SFR interrupt flag register 1 IFG1 Read/write 002h Reset with PUC

(1)

Some of the register bits are also PUC initialized (see Section 5.3.2).

(2)

The initial state of BCSCTL3 is 000h in the MSP430AFE2xx devices.

282

Basic Clock Module+ SLAU144J–December 2004–Revised July 2013

Submit Documentation Feedback