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MSP430x2xx Family Enhancements

1.5 MSP430x2xx Family Enhancements

Table 1-1 highlights enhancements made to the MSP430x2xx family. The enhancements are discussed

fully in the following chapters, or in the case of improved device parameters, shown in the device-specific

data sheet.

Table 1-1. MSP430x2xx Family Enhancements

Subject Enhancement

• Brownout reset is included on all MSP430x2xx devices.

Reset

• PORIFG and RSTIFG flags have been added to IFG1 to indicate the cause of a reset.

• An instruction fetch from the address range 0x0000 - 0x01FF will reset the device.

• All MSP430x2xx devices integrate the Watchdog Timer+ module (WDT+). The WDT+

Watchdog Timer

ensures the clock source for the timer is never disabled.

• The LFXT1 oscillator has selectable load capacitors in LF mode.

• The LFXT1 supports up to 16-MHz crystals in HF mode.

• The LFXT1 includes oscillator fault detection in LF mode.

• The XIN and XOUT pins are shared function pins on 20- and 28-pin devices.

Basic Clock System

• The external R

OSC

feature of the DCO not supported on some devices. Software should not

set the LSB of the BCSCTL2 register in this case. See the device-specific data sheet for

details.

• The DCO operating frequency has been significantly increased.

• The DCO temperature stability has been significantly improved.

• The information memory has 4 segments of 64 bytes each.

• SegmentA is individually locked with the LOCKA bit.

• All information if protected from mass erase with the LOCKA bit.

• Segment erases can be interrupted by an interrupt.

Flash Memory

• Flash updates can be aborted by an interrupt.

• Flash programming voltage has been lowered to 2.2 V

• Program/erase time has been reduced.

• Clock failure aborts a flash update.

• All ports have integrated pullup/pulldown resistors.

• P2.6 and P2.7 functions have been added to 20- and 28- pin devices. These are shared

Digital I/O

functions with XIN and XOUT. Software must not clear the P2SELx bits for these pins if

crystal operation is required.

Comparator_A

• Comparator_A has expanded input capability with a new input multiplexer.

• Typical LPM3 current consumption has been reduced almost 50% at 3 V.

Low Power

DCO startup time has been significantly reduced.

Operating frequency

• The maximum operating frequency is 16 MHz at 3.3 V.

• An incorrect password causes a mass erase.

BSL

• BSL entry sequence is more robust to prevent accidental entry and erasure.

SLAU144J–December 2004–Revised July 2013 Introduction

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